TESIS PUCP Esta obra ha sido publicada bajo la licencia Creative Commons Reconocimiento-No comercial-Compartir bajo la misma licencia 2.5 Perú. Para ver una copia de dicha licencia, visite http://creativecommons.org/licenses/by-nc-sa/2.5/pe/ Lima, octubre del 2010 ASESOR: Willy Eduardo Carrera Soria Jhair Andree Baldárrago Catcoparco PONTIFICIA UNIVERSIDAD CATÓLICA DEL PERÚ FACULTAD DE CIENCIAS E INGENIERÍA MEDIANTE DEGRADÉ EN LEDS DE POTENCIA RGB Anexos APLICADOS A PANELES PUBLICITARIOS DISEÑO DE EFECTOS Y VARIACIÓN DE COLORES DISPLAYTRONIC A DIVISION OF ZE XIAMEN CO., LTD. SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY PART NUMBER: ACM 1602N SERIES DATE: August 9, 1999 ACM1602N SERIES LCD MODULE DISPLAYTRONIC A DIVISION OF ZE XIAMEN 09/15/99 1 1.0 MECHANICAL SPECS 1. Overall Module Size 85.0mm(W) x 29.5mm(H) x max 13.5mm(D) for LED backlight version 85.0mm(W) x 29.5mm(H) x max 9.5mm(D) for reflective version 2. Dot Size 0.56mm(W) x 0.61mm(H) 3. Dot Pitch 0.61mm(W) x 0.66mm(H) 4. Duty 1/16 5. Controller IC KS0066 6. LC Fluid Options TN, STN 7. Polarizer Options Reflective, Transflective, Transmissive 8. Backlight Options LED 9. Temperature Range Options Standard(0ºC ~ 50ºC), Wide(-20ºC ~ 70ºC) 2.0 ABSOLUTE MAXIMUM RATINGS Item Symbol Min Typ Max Unit Operating temperature (Standard) Top 0 - 50 ºC Storage temperature (Standard) Tst -10 - 60 ºC Operating temperature (Wide temperature) Top -20 - 70 ºC Storage temperature (Wide temperature) Tst -30 - 80 ºC Input voltage Vin Vss Vdd V Supply voltage for logic Vdd- Vss 2.7 - 5.5 V Supply voltage for LCD drive Vdd- Vo 3.0 4.6 6.5 V ACM1602N SERIES LCD MODULE DISPLAYTRONIC A DIVISION OF ZE XIAMEN 09/15/99 2 3.0 ELECTRICAL CHARACTERISTICS Item Symbol Condition Min Typ Max Unit Input voltage (high) Vih H level 2.2 - Vdd V Input voltage (low) Vil L level 0 - 0.6 V 0ºC - 4.8 5.4 25ºC 4.2 4.6 -Recommended LC Driving Voltage (Standard Temp) Vdd - Vo 50ºC 3.9 4.3 - V -20ºC - 6.4 7.2 0ºC - 4.8 - 50ºC - 4.2 - Recommended LC Driving Voltage (Wide Temp) Vdd -Vo 70ºC 3.5 4.0 - V Power Supply Current Idd Vdd=5.0V, fosc=270kHz - 0.8 1.8 mA LED Power Supply Voltage Vfled R=6.8W - 4.6 5.0 V LED Power Supply Current Ifled R=6.8W - 120 300 mA 4.0 OPTICAL CHARACTERISTICS (Ta=25ºC, Vdd= 5.0V±0.25V, TN LC fluid) Item Symbol Condition Min Typ Max Unit Viewing angle (horizontal) q Cr ³ 4.0 -25 - - deg Viewing angle (vertical) f Cr ³ 4.0 -30 - 30 deg Contrast Ratio Cr f=0°, q=0° - 2 - Response time (rise) Tr f=0°, q=0° - 120 150 ms Response time (fall) Tf f=0°, q=0° - 120 150 ms ACM1602N SERIES LCD MODULE DISPLAYTRONIC A DIVISION OF ZE XIAMEN 09/15/99 3 4.1 OPTICAL CHARACTERISTICS (Ta=25ºC, Vdd= 5.0V±0.25V, STN LC fluid) Item Symbol Condition Min Typ Max Unit Viewing angle (horizontal) q Cr ³ 2.0 -60 - 35 deg Viewing angle (vertical) f Cr ³ 2.0 -40 - 40 deg Contrast Ratio Cr f=0°, q=0° - 6 - Response time (rise) Tr f=0°, q=0° - 150 250 ms Response time (fall) Tf f=0°, q=0° - 150 250 ms 5.0 BLOCK DIAGRAM LCD 16 X 2 U2 U1 SEG1- 40 SEG41- 80 SEG 1 SEG 80 COM 16 8 LED BACKLIGHT 1. Vdd 2. Vss 3. Vo 4. RS 5. R/W 6. E 7. DB0 14. DB7 ~ +/A BL+ -/K BL- 40 40 16 COM 1 COM16 ACM1602N SERIES LCD MODULE DISPLAYTRONIC A DIVISION OF ZE XIAMEN 09/15/99 4 6.0 PIN ASSIGNMENT 7.0 POWER SUPPLY Pin No. Symbol Function 1 Vdd +5V 2 Vss Ground 3 Vo LCD contrast adjust 4 RS Register select 5 R/W Read / write 6 E Enable 7 DB0 Data bit 0 8 DB1 Data bit 1 9 DB2 Data bit 2 10 DB3 Data bit 3 11 DB4 Data bit 4 12 DB5 Data bit 5 13 DB6 Data bit 6 14 DB7 Data bit 7 +/A BL+ Power Supply for BL+ -/K BL- Power Supply for BL- 8.0 TIMING CHARACTERISTICS Item Symbol Test Condition Min. Typ. Max. Unit Enable cycle time tC Fig. a, Fig. b 500 - - ns Enable pulse width tW Fig. a, Fig. b 220 - - ns Enable rise/fall time tR , tF Fig. a, Fig. b - - 25 ns RS, R/W set up time tSU Fig. a, Fig. b 40 - - ns RS, R/W hold time tH Fig. a, Fig. b 10 - - ns Data delay time tD Fig. b - - 120 ns Data set up time tDSU Fig. a 60 - - ns Data hold time tDH Fig. a, Fig. b 20 - - ns Vss Vo Vdd Vr +5V STANDARD TEMP RANGE Vss Vo Vdd Vr +5V WIDE TEMP RANGE -5V Vr = 10KW ~ 20KW ACM1602N SERIES LCD MODULE DISPLAYTRONIC A DIVISION OF ZE XIAMEN 09/15/99 5 VIH1 VIL1 V IL1 IH1 IL1V V VIH1 VIL1 VIL1 VIH1 IL1V VIH1 IL1V Valid Data tSU tH tW tHtF tR tDSU tDH tC RS R/W E DB0~DB7 VIL1 VIH1 VIL1 Fig. a Interface timing (data write) VIH1 VIL1 VIH1 IH1 IL1V V VIH1 VIL1 VIH1 VIH1 IL1V VIH1 IL1V Valid Data tSU tH tW tHtF tR tDSU tDH tC RS R/W E DB0~DB7 VIL1 tD VIH1 IL1V Fig. b Interface timing (data read) ACM1602N SERIES LCD MODULE DISPLAYTRONIC A DIVISION OF ZE XIAMEN 09/15/99 6 9.0 MECHANICAL DIAGRAM ACM1602N SERIES LCD MODULE DISPLAYTRONIC A DIVISION OF ZE XIAMEN 09/15/99 7 10.0 RELIABILITY TEST Evaluations and Assessment* Storage Condition Content Current Consumption Oozing Contrast Other Appearances Operation at high temperature and humidity 40ºC,90% RH,240hrs Twice initial value or less none More than 80% of initial value No abnormality High temperature storage 60ºC, 240hrs Twice initial value or less none More than 80% of initial value No abnormality Low temperature storage -20ºC, 240hrs Twice initial value or less More than 80% of initial value No abnormality *Evaluations and assessment to be made two hours after returning to room temperature (25ºC±5ºC). *The LCDs subjected to the test must not have dew condensation. ACM1602N SERIES LCD MODULE DISPLAYTRONIC A DIVISION OF ZE XIAMEN 09/15/99 8 11.0 DISPLAY INSTRUCTION TABLE COMMAND R S R/ W DB 7 DB 6 DB 5 DB 4 DB 3 DB 2 DB 1 DB 0 DESCRIPTION Executing time fosc=250khz Clear Display 0 0 0 0 0 0 0 0 0 1 Clears Display & Returns to Address 0. 1.64ms Cursor at Home 0 0 0 0 0 0 0 0 1 x Returns Cursor to Address 0. Also returns the display being shifted to the original position. DDRAM contents remain unchanged. 1.64ms Entry Mode Set 0 0 0 0 0 0 0 1 I/D S I/D: Set Cursor Moving Direction I/D=1: Increment I/D=0: Decrement S: Specify Shift of Display S=1: The display is shifted S=0: The display is not shifted 40µs Display ON/OFF Control 0 0 0 0 0 0 1 D C B Display D=1: Display on D=0: Display off Cursor C=1: Cursor on C=0: Cursor off Brink B=1: Brink on B=0: Brink off 40µs Cursor / Display Shift 0 0 0 0 0 1 S/C R/L x x Moves cursor or shifts the display w/o changing DD RAM contents S/C=0: Cursor Shift (RAM unchanged) S/C=1: Display Shift (RAM unchanged) R/L=1: Shift to the Right R/L=0: Shift to the Left 40µs Function Set 0 0 0 0 1 DL N F x x Sets data bus length (DL), # of display lines (N), and character fonts (F). DL=1: 8 bits F=0: 5x7 dots DL=0: 4 bits F=1: 5x10 dots N=0: 1 line display N=1: 2 lines display 40µs Set CG RAM Address 0 0 0 1 Character Generator (CG) RAM Address Sets CG RAM address. CG RAM data is sent and received after this instruction. 40µs Set DD RAM Address 0 0 1 Display Data (DD) RAM Address / Cursor Address Sets DD RAM address. DD Ram data is sent and received after this instruction. 40µs Busy Flag / Address Read 0 1 B F Address counter used for both DD & CG RAM address Reads Busy Flag (BF) and address counter contents. 40µs Write Data 1 0 Write Data Writes data into DDRAM or CGRAM. 46µs Read Data 1 1 Read Data Reads data from DDRAM or CGRAM. 46µs x: Don't Care. ACM1602N SERIES LCD MODULE DISPLAYTRONIC A DIVISION OF ZE XIAMEN 09/15/99 9 12.0 STANDARD CHARACTER PATTERNS Note: The character generator RAM is the RAM with which the user can rewrite character patterns by program. 4N X X M , H 11A X M — G en eral P u rp o se 6-P in P h o to tran sisto r O p to co u p lers ©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com 4NXXM, H11AXM Rev. 1.0.2 January 2009 4N25M, 4N26M, 4N27M, 4N28M, 4N35M, 4N36M, 4N37M, H11A1M, H11A2M, H11A3M, H11A4M, H11A5M General Purpose 6-Pin Phototransistor Optocouplers Features ■ UL recognized (File # E90700, Volume 2) ■ VDE recognized (File # 102497) – Add option V (e.g., 4N25VM) Applications ■ Power supply regulators ■ Digital logic inputs ■ Microprocessor inputs Description The general purpose optocouplers consist of a gallium arsenide infrared emitting diode driving a silicon pho- totransistor in a 6-pin dual in-line package. Schematic Package Outlines PIN 1. ANODE 2. CATHODE 3. NO CONNECTION 4. EMITTER 5. COLLECTOR 6. BASE 2 1 3 NC 5 6 4 ©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com 4NXXM, H11AXM Rev. 1.0.2 2 4N X X M , H 11A X M — G en eral P u rp o se 6-P in P h o to tran sisto r O p to co u p lers Absolute Maximum Ratings (T A = 25°C unless otherwise specified) Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Electrical Characteristics (T A = 25°C unless otherwise specified) Individual Component Characteristics Isolation Characteristics *Typical values at T A = 25°C Symbol Parameter Value Units TOTAL DEVICE T STG Storage Temperature -40 to +150 °C T OPR Operating Temperature -40 to +100 °C T SOL Wave solder temperature (see page 8 for reflow solder profile) 260 for 10 sec °C P D Total Device Power Dissipation @ T A = 25°C Derate above 25°C 250 mW 2.94 EMITTER I F DC/Average Forward Input Current 60 mA V R Reverse Input Voltage 6 V I F (pk) Forward Current – Peak (300µs, 2% Duty Cycle) 3 A P D LED Power Dissipation @ T A = 25°C Derate above 25°C 120 mW 1.41 mW/°C DETECTOR V CEO Collector-Emitter Voltage 30 V V CBO Collector-Base Voltage 70 V V ECO Emitter-Collector Voltage 7 V P D Detector Power Dissipation @ T A = 25°C Derate above 25°C 150 mW 1.76 mW/°C Symbol Parameter Test Conditions Min. Typ.* Max. Unit EMITTER V F Input Forward Voltage I F = 10mA 1.18 1.50 V I R Reverse Leakage Current V R = 6.0V 0.001 10 µA DETECTOR BV CEO Collector-Emitter Breakdown Voltage I C = 1.0mA, I F = 0 30 100 V BV CBO Collector-Base Breakdown Voltage I C = 100µA, I F = 0 70 120 V BV ECO Emitter-Collector Breakdown Voltage I E = 100µA, I F = 0 7 10 V I CEO Collector-Emitter Dark Current V CE = 10V, I F = 0 1 50 nA I CBO Collector-Base Dark Current V CB = 10V 20 nA C CE Capacitance V CE = 0V, f = 1 MHz 8 pF Symbol Characteristic Test Conditions Min. Typ.* Max. Units V ISO Input-Output Isolation Voltage f = 60Hz, t = 1 sec 7500 Vac(pk) R ISO Isolation Resistance V I-O = 500 VDC 10 11 Ω C ISO Isolation Capacitance V I-O = &, f = 1MHz 0.2 2 pF ©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com 4NXXM, H11AXM Rev. 1.0.2 3 4N X X M , H 11A X M — G en eral P u rp o se 6-P in P h o to tran sisto r O p to co u p lers Electrical Characteristics (Continued) (T A = 25°C unless otherwise specified) Transfer Characteristics * Typical values at T A = 25°C Symbol Parameter Test Conditions Device Min. Typ.* Max. Unit DC CHARACTERISTICS CTR Current Transfer Ratio, Collector to Emitter I F = 10mA, V CE = 10V 4N35M, 4N36M, 4N37M 100 % H11A1M 50 H11A5M 30 4N25M, 4N26M H11A2M, H11A3M 20 4N27M, 4N28M H11A4M 10 I F = 10mA, V CE = 10V, T A = -55°C 4N35M, 4N36M, 4N37M 40 I F = 10mA, V CE = 10V, T A = +100°C 4N35M, 4N36M, 4N37M 40 V CE (SAT) Collector-Emitter Saturation Voltage I C = 2mA, I F = 50mA 4N25M, 4N26M, 4N27M, 4N28M, 0.5 V I C = 0.5mA, I F = 10mA 4N35M, 4N36M, 4N37M 0.3 H11A1M, H11A2M, H11A3M, H11A4M, H11A5M 0.4 AC CHARACTERISTICS T ON Non-Saturated Turn-on Time I F = 10mA, V CC = 10V, R L = 100 Ω (Fig. 11) 4N25M, 4N26M, 4N27M, 4N28M, H11A1M, H11A2M, H11A3M, H11A4, H11A5M 2 µs I C = 2mA, V CC = 10V, R L = 100 Ω (Fig. 11) 4N35M, 4N36M, 4N37M 2 10 µs T OFF Turn-off Time I F = 10mA, V CC = 10V, R L = 100 Ω (Fig. 11) 4N25M, 4N26M, 4N27M, 4N28M, H11A1M, H11A2M, H11A3M, H11A4M, H11A5M 2 µs I C = 2mA, V CC = 10V, R L = 100 Ω (Fig. 11) 4N35M, 4N36M, 4N37M 2 10 ©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com 4NXXM, H11AXM Rev. 1.0.2 4 4N X X M , H 11A X M — G en eral P u rp o se 6-P in P h o to tran sisto r O p to co u p lers Typical Performance Curves Fig. 2 Normalized CTR vs. Forward Current IF - FORWARD CURRENT (mA) 0 2 4 6 8 10 12 14 16 18 20 N O RM AL IZ ED C TR 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VCE = 5.0V TA = 25°C Normalized to IF = 10 mA Fig. 3 Normalized CTR vs. Ambient Temperature TA - AMBIENT TEMPERATURE (°C) -60 -40 -20 0 20 40 60 80 100 N O RM AL IZ ED C TR 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IF = 5 mA IF = 10 mA IF = 20 mA Normalized to IF = 10 mA TA = 25°C IF - LED FORWARD CURRENT (mA) V F - FO RW AR D V O LT AG E (V ) Fig. 1 LED Forward Voltage vs. Forward Current 1 10 100 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 TA = 25°C TA = -55°C TA = 100°C Fig. 5 CTR vs. RBE (Saturated) RBE- BASE RESISTANCE (k Ω) N O RM AL IZ ED C TR ( C TR R BE / C TR R BE (O PE N) ) 10 100 1000 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 IF = 20 mA IF = 10 mA IF = 5 mA VCE= 0.3 V Fig. 4 CTR vs. RBE (Unsaturated) RBE- BASE RESISTANCE (kΩ) N O RM AL IZ ED C TR ( C TR R BE / C TR R BE (O PE N) ) 10 100 1000 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 VCE = 5.0 V IF = 20 mA IF = 10 mA IF = 5 mA 0.01 0.1 1 10 0.001 0.01 0.1 1 10 100 IF = 5 mA IF = 20 mA IF = 10 mA Fig. 6 Collector-Emitter Saturation Voltage vs. Collector Current IC - COLLECTOR CURRENT (mA) V C E (S AT ) - CO LL EC TO R- EM IT TE R SA TU RA TI O N VO LT AG E (V ) IF = 2.5 mA TA = 25˚C ©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com 4NXXM, H11AXM Rev. 1.0.2 5 4N X X M , H 11A X M — G en eral P u rp o se 6-P in P h o to tran sisto r O p to co u p lers N O RM AL IZ ED t o n - (t o n (R BE ) / t o n (op en )) Fig. 8 Normalized ton vs. RBE RBE- BASE RESISTANCE (k Ω) 10 100 1000 10000 100000 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VCC = 10 V IC = 2 mA RL = 100 Ω SW IT CH IN G S PE ED - (µ s) Fig. 7 Switching Speed vs. Load Resistor R-LOAD RESISTOR (kΩ) 0.1 1 10 100 0.1 1 10 100 1000 Toff IF = 10 mA VCC = 10 V TA = 25°C Tr Ton Tf 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 VCC = 10 V IC = 2 mA RL = 100 Ω N O RM AL IZ ED t o ff - (t o ff(R BE ) / t o ff(o pe n)) 10 100 1000 10000 100000 RBE- BASE RESISTANCE (k Ω) Fig. 9 Normalized toff vs. RBE Fig. 10 Dark Current vs. Ambient Temperature TA - AMBIENT TEMPERATURE (°C) 0 20 40 60 80 100 I C EO - CO LL EC TO R -E MI TT ER D AR K CU RR EN T (nA ) 0.001 0.01 0.1 1 10 100 1000 10000 VCE = 10 V TA = 25°C OUTPUT PULSE INPUT PULSE TEST CIRCUIT WAVE FORMS tr tf INPUT IF RL RBE VCC = 10V OUTPUT ton 10% 90% toff Figure 11. Switching Time Test Circuit and Waveforms IC Adjust IF to produce IC = 2 mA Typical Performance Curves (Continued) ©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com 4NXXM, H11AXM Rev. 1.0.2 6 4N X X M , H 11A X M — G en eral P u rp o se 6-P in P h o to tran sisto r O p to co u p lers Package Dimensions 8.13–8.89 6.10–6.60 Pin 1 6 4 1 3 0.25–0.36 5.08 (Max.) 3.28–3.53 0.38 (Min.) 2.54–3.81 2.54 (Bsc)(0.86) 0.41–0.51 1.02–1.78 0.76–1.14 8.13–8.89 6.10–6.60 Pin 1 6 4 1 3 0.25–0.36 5.08 (Max.) 3.28–3.53 0.38 (Min.) 2.54–3.81 2.54 (Bsc)(0.86) 0.41–0.51 1.02–1.78 0.76–1.14 7.62 (Typ.) 15° (Typ.) 0.20–0.30 0.20–0.30 10.16–10.80 Through Hole 0.4" Lead Spacing Surface Mount Rcommended Pad Layout (1.78) (2.54) (1.52) (7.49) (10.54) (0.76) 8.13–8.89 Note: All dimensions in mm. 6.10–6.60 8.43–9.90 Pin 1 6 4 1 3 0.25–0.36 2.54 (Bsc) (0.86) 0.41–0.51 1.02–1.78 0.76–1.14 0.38 (Min.) 3.28–3.53 5.08 (Max.) 0.20–0.30 0.16–0.88 (8.13) ©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com 4NXXM, H11AXM Rev. 1.0.2 7 4N X X M , H 11A X M — G en eral P u rp o se 6-P in P h o to tran sisto r O p to co u p lers Ordering Information Marking Information Option Order Entry Identifier (Example) Description No option 4N25M Standard Through Hole Device S 4N25SM Surface Mount Lead Bend SR2 4N25SR2M Surface Mount; Tape and Reel T 4N25TM 0.4" Lead Spacing V 4N25VM VDE 0884 TV 4N25TVM VDE 0884, 0.4" Lead Spacing SV 4N25SVM VDE 0884, Surface Mount SR2V 4N25SR2VM VDE 0884, Surface Mount, Tape and Reel *Note – Parts that do not have the ‘V’ option (see definition 3 above) that are marked with date code ‘325’ or earlier are marked in portrait format. Definitions 1 Fairchild logo 2 Device number 3 VDE mark (Note: Only appears on parts ordered with VDE option – See order entry table) 4 One digit year code, e.g., ‘7’ 5 Two digit work week ranging from ‘01’ to ‘53’ 6 Assembly package code 4N25 V X YY Q 1 2 6 43 5 ©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com 4NXXM, H11AXM Rev. 1.0.2 8 4N X X M , H 11A X M — G en eral P u rp o se 6-P in P h o to tran sisto r O p to co u p lers Carrier Tape Specification Reflow Profile 4.0 ± 0.1 Ø1.5 MIN User Direction of Feed 2.0 ± 0.05 1.75 ± 0.10 11.5 ± 1.0 24.0 ± 0.3 12.0 ± 0.1 0.30 ± 0.05 21.0 ± 0.1 4.5 ± 0.20 0.1 MAX 10.1 ± 0.20 9.1 ± 0.20 Ø1.5 ± 0.1/-0 300 280 260 240 220 200 180 160 140 120 100 80 60 40 20 0 °C Time (s) 0 60 180120 270 260°C >245°C = 42 Sec Time above 183°C = 90 Sec 360 1.822°C/Sec Ramp up rate 33 Sec ©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com 4NXXM, H11AXM Rev. 1.0.2 9 TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EfficentMax™ EZSWITCH™ * ™ ® Fairchild® Fairchild Semiconductor® FACT Quiet Series™ FACT® FAST® FastvCore™ FlashWriter® * FPS™ F-PFS™ FRFET® Global Power Resource SM Green FPS™ Green FPS™ e-Series™ GTO™ IntelliMAX™ ISOPLANAR™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MillerDrive™ MotionMax™ Motion-SPM™ OPTOLOGIC® OPTOPLANAR® ® PDP SPM™ Power-SPM™ PowerTrench® PowerXS™ Programmable Active Droop™ QFET® QS™ Quiet Series™ RapidConfigure™ ™ Saving our world, 1mW/W/kW at a time™ SmartMax™ SMART START™ SPM® STEALTH™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SupreMOS™ SyncFET™ ® The Power Franchise® TinyBoost™ TinyBuck™ TinyLogic® TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™ TriFault Detect™ µSerDes™ UHC® Ultra FRFET™ UniFET™ VCX™ VisualMax™ XS™ * EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change inany manner without notice. Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. FairchildSemiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changesat any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor.The datasheet is for reference information only. Rev. I38 4N X X M , H 11A X M — G en eral P u rp o se 6-P in P h o to tran sisto r O p to co u p lers C B E TO-92 C B E B C C SOT-223 E NPN General Purpose Amplifier This device is designed as a general purpose amplifier and switch. The useful dynamic range extends to 100 mA as a switch and to 100 MHz as an amplifier. Absolute Maximum Ratings* T A = 25°C unless otherwise noted *These ratings are limiting values above which the serviceability of any semiconductor device may be impaired. NOTES: 1) These ratings are based on a maximum junction temperature of 150 degrees C. 2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations. Symbol Parameter Value Units VCEO Collector-Emitter Voltage 40 V VCBO Collector-Base Voltage 60 V VEBO Emitter-Base Voltage 6.0 V IC Collector Current - Continuous 200 mA TJ, Tstg Operating and Storage Junction Temperature Range -55 to +150 °C  2001 Fairchild Semiconductor Corporation Thermal Characteristics T A = 25°C unless otherwise noted Symbol Characteristic Max Units 2N3904 *MMBT3904 **PZT3904 PD Total Device Dissipation Derate above 25°C 625 5.0 350 2.8 1,000 8.0 mW mW/°C RθJC Thermal Resistance, Junction to Case 83.3 °C/W RθJA Thermal Resistance, Junction to Ambient 200 357 125 °C/W *Device mounted on FR-4 PCB 1.6" X 1.6" X 0.06." **Device mounted on FR-4 PCB 36 mm X 18 mm X 1.5 mm; mounting pad for the collector lead min. 6 cm2. 2N3904 MMBT3904 SOT-23 Mark: 1A PZT3904 2N 3904 / M M B T3904 / PZT3904 2N3904/MMBT3904/PZT3904, Rev A Electrical Characteristics T A = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Max Units V(BR)CEO Collector-Emitter Breakdown Voltage IC = 1.0 mA, IB = 0 40 V V(BR)CBO Collector-Base Breakdown Voltage IC = 10 µA, IE = 0 60 V V(BR)EBO Emitter-Base Breakdown Voltage IE = 10 µA, IC = 0 6.0 V IBL Base Cutoff Current VCE = 30 V, VEB = 3V 50 nA ICEX Collector Cutoff Current VCE = 30 V, VEB = 3V 50 nA OFF CHARACTERISTICS ON CHARACTERISTICS* SMALL SIGNAL CHARACTERISTICS SWITCHING CHARACTERISTICS *Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% NPN (Is=6.734f Xti=3 Eg=1.11 Vaf=74.03 Bf=416.4 Ne=1.259 Ise=6.734 Ikf=66.78m Xtb=1.5 Br=.7371 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=3.638p Mjc=.3085 Vjc=.75 Fc=.5 Cje=4.493p Mje=.2593 Vje=.75 Tr=239.5n Tf=301.2p Itf=.4 Vtf=4 Xtf=2 Rb=10) Spice Model fT Current Gain - Bandwidth Product IC = 10 mA, VCE = 20 V, f = 100 MHz 300 MHz Cobo Output Capacitance VCB = 5.0 V, IE = 0, f = 1.0 MHz 4.0 pF Cibo Input Capacitance VEB = 0.5 V, IC = 0, f = 1.0 MHz 8.0 pF NF Noise Figure IC = 100 µA, VCE = 5.0 V, RS =1.0kΩ,f=10 Hz to 15.7kHz 5.0 dB td Delay Time VCC = 3.0 V, VBE = 0.5 V, 35 ns tr Rise Time IC = 10 mA, IB1 = 1.0 mA 35 ns ts Storage Time VCC = 3.0 V, IC = 10mA 200 ns tf Fall Time IB1 = IB2 = 1.0 mA 50 ns hFE DC Current Gain IC = 0.1 mA, VCE = 1.0 V IC = 1.0 mA, VCE = 1.0 V IC = 10 mA, VCE = 1.0 V IC = 50 mA, VCE = 1.0 V IC = 100 mA, VCE = 1.0 V 40 70 100 60 30 300 VCE(sat) Collector-Emitter Saturation Voltage IC = 10 mA, IB = 1.0 mA IC = 50 mA, IB = 5.0 mA 0.2 0.3 V V VBE(sat) Base-Emitter Saturation Voltage IC = 10 mA, IB = 1.0 mA IC = 50 mA, IB = 5.0 mA 0.65 0.85 0.95 V V 2N 3904 / M M B T3904 / PZT3904 NPN General Purpose Amplifier (continued) 2N3904 / M M BT3904 / PZT3904 Typical Characteristics Base-Emitter ON Voltage vs Collector Current 0.1 1 10 100 0.2 0.4 0.6 0.8 1 I - COLLECTOR CURRENT (mA)V - BA SE -E M IT TE R O N VO LT AG E (V ) BE (O N) C V = 5VCE 25 °C 125 °C - 40 °C NPN General Purpose Amplifier (continued) Base-Emitter Saturation Voltage vs Collector Current 0.1 1 10 100 0.4 0.6 0.8 1 I - COLLECTOR CURRENT (mA) V - B AS E- EM IT TE R VO LT AG E (V ) B ES AT C β = 10 25 °C 125 °C - 40 °C Collector-Emitter Saturation Voltage vs Collector Current 0.1 1 10 100 0.05 0.1 0.15 I - COLLECTOR CURRENT (mA)V - CO LL EC TO R- EM IT TE R VO LT AG E (V ) CE SA T 25 °C C β = 10 125 °C - 40 °C Collector-Cutoff Current vs Ambient Temperature 25 50 75 100 125 150 0.1 1 10 100 500 T - AMBIENT TEMPERATURE ( C) I - CO LL EC TO R C UR RE N T (n A) A V = 30VCB CB O ° Capacitance vs Reverse Bias Voltage 0.1 1 10 100 1 2 3 4 5 10 REVERSE BIAS VOLTAGE (V) CA PA CI TA N CE (p F) C obo C ibo f = 1.0 MHz Typical Pulsed Current Gain vs Collector Current 0.1 1 10 100 0 100 200 300 400 500 I - COLLECTOR CURRENT (mA)h - TY P IC AL P U LS ED C UR RE NT G AI N FE - 40 °C 25 °C C V = 5VCE 125 °C Power Dissipation vs Ambient Temperature 0 25 50 75 100 125 150 0 0.25 0.5 0.75 1 TEMPERATURE ( C) P - PO W ER D IS SI PA TI ON (W ) D o SOT-223 SOT-23 TO-92 Typical Characteristics (continued) Noise Figure vs Frequency 0.1 1 10 100 0 2 4 6 8 10 12 f - FREQUENCY (kHz) N F - NO IS E FI G UR E (dB ) V = 5.0VCE I = 100 µA, R = 500 ΩC S I = 1.0 mA R = 200Ω C S I = 50 µA R = 1.0 kΩ C S I = 0.5 mA R = 200Ω C S kΩ Noise Figure vs Source Resistance 0.1 1 10 100 0 2 4 6 8 10 12 R - SOURCE RESISTANCE ( ) N F - NO IS E FI G UR E (d B) I = 100 µAC I = 1.0 mAC S I = 50 µAC I = 5.0 mAC θ - DEG R EES 0 40 60 80 100 120 140 160 20 180 Current Gain and Phase Angle vs Frequency 1 10 100 1000 0 5 10 15 20 25 30 35 40 45 50 f - FREQUENCY (MHz) h - CU RR EN T G AI N (d B) θ V = 40VCE I = 10 mAC h fe fe Turn-On Time vs Collector Current 1 10 100 5 10 100 500 I - COLLECTOR CURRENT (mA) TI M E (n S) I = I = B1 C B2 I c 10 40V 15V 2.0V t @ V = 0VCBd t @ V = 3.0VCCr Rise Time vs Collector Current 1 10 100 5 10 100 500 I - COLLECTOR CURRENT (mA) t - R IS E TI M E (n s ) I = I = B1 C B2 I c 10 T = 125°C T = 25°CJ V = 40VCC r J 2N3904 / M M BT3904 / PZT3904 NPN General Purpose Amplifier (continued) 2N3904 / M M BT3904 / PZT3904 NPN General Purpose Amplifier (continued) Typical Characteristics (continued) Storage Time vs Collector Current 1 10 100 5 10 100 500 I - COLLECTOR CURRENT (mA) t - ST O R AG E TI M E (ns ) I = I = B1 C B2 I c 10 S T = 125°C T = 25°CJ J Fall Time vs Collector Current 1 10 100 5 10 100 500 I - COLLECTOR CURRENT (mA) t - FA LL TI M E (n s ) I = I = B1 C B2 I c 10 V = 40VCC f T = 125°C T = 25°CJ J Current Gain 0.1 1 10 10 100 500 I - COLLECTOR CURRENT (mA) h - CU RR EN T G AI N V = 10 VCE C fe f = 1.0 kHz T = 25 CA o Output Admittance 0.1 1 10 1 10 100 I - COLLECTOR CURRENT (mA) h - O UT PU T A D M IT TA NC E ( m ho s) V = 10 VCE C o e f = 1.0 kHz T = 25 CA oµ Input Impedance 0.1 1 10 0.1 1 10 100 I - COLLECTOR CURRENT (mA) h - IN PU T IM PE DA N CE (k ) V = 10 VCE C ie f = 1.0 kHz T = 25 CA o Ω Voltage Feedback Ratio 0.1 1 10 1 2 3 4 5 7 10 I - COLLECTOR CURRENT (mA) h - VO LT AG E FE ED BA CK R AT IO (x1 0 ) V = 10 VCE C re f = 1.0 kHz T = 25 CA o _ 4 Test Circuits 10 KΩ 3.0 V 275 Ω t1 C1 < 4.0 pF Duty Cycle = 2% Duty Cycle = 2% < 1.0 ns - 0.5 V 300 ns 10.6 V 10 < t1 < 500 µs 10.9 V - 9.1 V < 1.0 ns 0 0 10 KΩ 3.0 V 275 Ω C1 < 4.0 pF 1N916 FIGURE 2: Storage and Fall Time Equivalent Test Circuit FIGURE 1: Delay and Rise Time Equivalent Test Circuit 2N3904 / M M BT3904 / PZT3904 NPN General Purpose Amplifier (continued) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Preliminary No Identification Needed Obsolete This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Formative or In Design First Production Full Production Not In Production DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Rev. G  ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST SyncFET™ TinyLogic™ UHC™ VCX™   Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area 175 Operating Temperature Lower Leakage Current : 10 A (Max.) @ VDS = 100V Lower RDS(ON) : 0.041 (Typ.) Advanced Power MOSFET Thermal Resistance Junction-to-Case Case-to-Sink Junction-to-Ambient R JC R CS R JA /W Characteristic Max. UnitsSymbol Typ. FEATURES Absolute Maximum Ratings Drain-to-Source Voltage Continuous Drain Current (TC=25 ) Continuous Drain Current (TC=100 ) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TC=25 ) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8” from case for 5-seconds Characteristic Value UnitsSymbol IDM VGS EAS IAR EAR dv/dt ID PD TJ , TSTG TL A V mJ A mJ V/ns W W/ A VDSS V TO-220 1.Gate 2. Drain 3. Source 3 2 1 m W O1 O2 O3 OC OC O1 O1 OC OC OC OC OC q q q IRF540A BVDSS = 100 V RDS(on) = 0.052 ID = 28 A 100 28 19.8 110 523 28 10.7 6.5 107 0.71 - 55 to +175 300 1.4 -- 62.5 -- 0.5 -- W 20 +_ ©1999 Fairchild Semiconductor Corporation Rev. B N-CHANNEL POWER MOSFET Electrical Characteristics (TC=25 unless otherwise specified) Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse CharacteristicSymbol Max. UnitsTyp.Min. Test Condition Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain(“Miller”) Charge gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd BVDSS BV/ TJ VGS(th) RDS(on) IGSS IDSS V V V nA A pF ns nC -- -- -- -- -- -- -- -- -- -- -- -- -- VGS=0V,ID=250 A ID=250 A See Fig 7 VDS=5V,ID=250 A VGS=20V VGS=-20V VDS=100V VDS=80V,TC=150 VGS=10V,ID=14A VDS=40V,ID=14A VDD=50V,ID=28A, RG=9.1 See Fig 13 VDS=80V,VGS=10V, ID=28A See Fig 6 & Fig 12 Drain-to-Source Leakage Current VGS=0V,VDS=25V,f =1MHz See Fig 5 Source-Drain Diode Ratings and Characteristics Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge IS ISM VSD trr Qrr CharacteristicSymbol Max. UnitsTyp.Min. Test Condition -- -- -- -- -- A V ns C Integral reverse pn-diode in the MOSFET TJ=25 ,IS=28A,VGS=0V TJ=25 ,IF=28A diF/dt=100A/ s D D OC W W m O4 O5 OC m m OC O4 O4 O4 O4 O1 W OC m OC O5O4 m m IRF540A 100 -- 2.0 -- -- -- -- -- 0.11 -- -- -- -- -- 325 148 18 18 90 56 60 10.8 27.9 -- -- 4.0 100 -100 10 100 0.052 -- 1710 380 170 50 50 180 120 78 -- -- 22.56 1320 -- -- -- 132 0.63 28 110 1.5 -- -- Notes ; Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature L=1mH, IAS=28A, VDD=25V, RG=27 , Starting TJ =25 ISD 28A, di/dt 400A/ s, VDD BVDSS , Starting TJ =25 Pulse Test : Pulse Width = 250 s, Duty Cycle 2% Essentially Independent of Operating Temperature <_ <_<_ <_ O1 O2 O3 O4 O5 W oC oCm m N-CHANNEL POWER MOSFET Fig 1. Output Characteristics Fig 2. Transfer Characteristics Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current IRF540A 10-1 100 101 100 101 102 @ Notes : 1. 250 ms Pulse Test 2. TC = 25 oC VGS Top : 1 5 V 1 0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V I D , D ra in C ur re nt [A ] VDS , Drain-Source Voltage [V] 2 4 6 8 10 100 101 102 25 oC 175 oC - 55 oC @ Notes : 1. VGS = 0 V 2. VDS = 40 V 3. 250 ms Pulse Test I D , D ra in C ur re nt [A ] VGS , Gate-Source Voltage [V] 0 30 60 90 120 0.00 0.02 0.04 0.06 0.08 @ Note : TJ = 25 oC VGS = 20 V VGS = 10 V R D S( on ) , [ W ] Dr ai n- So ur ce O n- Re si st an ce ID , Drain Current [A] 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 100 101 102 175 oC 25 oC @ Notes : 1. VGS = 0 V 2. 250 ms Pulse TestI DR , R ev er se D ra in C ur re nt [A ] VSD , Source-Drain Voltage [V] 100 101 0 500 1000 1500 2000 2500 Ciss= Cgs+ Cgd (Cds= shorted ) Coss= Cds+ Cgd Crss= Cgd @ Notes : 1. VGS = 0 V 2. f = 1 MHzC rss C oss C iss Ca pa ci ta nc e [ pF ] VDS , Drain-Source Voltage [V] 0 10 20 30 40 50 60 70 0 5 10 VDS = 80 V VDS = 50 V VDS = 20 V @ Notes : ID =28.0 AV G S , Ga te -S ou rc e Vo lt ag e [ V] QG , Total Gate Charge [nC] N-CHANNEL POWER MOSFET Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature Fig 11. Thermal Response Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area PDM t1 t2 IRF540A -75 -50 -25 0 25 50 75 100 125 150 175 200 0.8 0.9 1.0 1.1 1.2 @ Notes : 1. VGS = 0 V 2. ID = 250 mA BV DS S , (N or ma li ze d) Dr ai n- So ur ce B re ak do wn V ol ta ge TJ , Junction Temperature [ oC] -75 -50 -25 0 25 50 75 100 125 150 175 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 @ Notes : 1. VGS = 10 V 2. ID = 14.0 A R D S( on ) , (N or ma li ze d) Dr ai n- So ur ce O n- Re si st an ce TJ , Junction Temperature [ oC] 100 101 102 10-1 100 101 102 103 10 ms DC 100 ms 1 ms 10 ms @ Notes : 1. TC = 25 oC 2. TJ = 175 oC 3. Single Pulse Operation in This Area is Limited by R DS(on) I D , D ra in C ur re nt [A ] VDS , Drain-Source Voltage [V] 10-5 10-4 10-3 10-2 10-1 100 101 10-2 10-1 100 single pulse 0.2 0.1 0.01 0.02 0.05 D=0.5 @ Notes : 1. Z qJ C(t)=1.4 oC/W Max. 2. Duty Factor, D=t1/t2 3. TJM-TC=PDM*ZqJ C(t) Z q JC (t ) , T he rm al R es po ns e t1 , Square Wave Pulse Duration [sec] 25 50 75 100 125 150 175 0 5 10 15 20 25 30 I D , D ra in C ur re nt [A ] Tc , Case Temperature [ oC] N-CHANNEL POWER MOSFET Fig 12. Gate Charge Test Circuit & Waveform Fig 13. Resistive Switching Test Circuit & Waveforms Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms EAS = LL IAS2----2 1 -------------------- BVDSS -- VDD BVDSS Vin Vout 10% 90% td(on) tr t on t off td(off) tf Charge VGS 10V Qg Qgs Qgd Vary tp to obtain required peak ID 10V VDDC LL VDS ID RG t p DUT BVDSS t p VDD IAS VDS (t) ID (t) Time VDD ( 0.5 rated VDS ) 10V Vout Vin RL DUT RG 3mA VGS Current Sampling (I G) Resistor Current Sampling (I D) Resistor DUT VDS 300nF 50K 200nF12V Same Type as DUT “ Current Regulator ” R1 R2 W IRF540A N-CHANNEL POWER MOSFET Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT VDS + -- L I S Driver VGS RG Same Type as DUT VGS • dv/dt controlled by “RG” • IS controlled by Duty Factor “D” VDD 10V VGS ( Driver ) I S ( DUT ) VDS ( DUT ) VDD Body Diode Forward Voltage Drop Vf IFM , Body Diode Forward Current Body Diode Reverse Current IRM Body Diode Recovery dv/dt di/dt D = Gate Pulse Width Gate Pulse Period -------------------------- IRF540A TRADEMARKS ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™ The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 TinyLogic™ 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Preliminary No Identification Needed Obsolete This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Formative or In Design First Production Full Production Not In Production DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. UHC™ VCX™ ©2006 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator March 2008 LM78XX/LM78XXA 3-Terminal 1A Positive Voltage Regulator Features ■ Output Current up to 1A ■ Output Voltages of 5, 6, 8, 9, 10, 12, 15, 18, 24 ■ Thermal Overload Protection ■ Short Circuit Protection ■ Output Transistor Safe Operating Area Protection General Description The LM78XX series of three terminal positive regulators are available in the TO-220 package and with several fixed output voltages, making them useful in a wide range of applications. Each type employs internal current limiting, thermal shut down and safe operating area pro- tection, making it essentially indestructible. If adequate heat sinking is provided, they can deliver over 1A output current. Although designed primarily as fixed voltage regulators, these devices can be used with external com- ponents to obtain adjustable voltages and currents. Ordering Information Product Number Output Voltage Tolerance Package Operating Temperature LM7805CT ± 4% TO-220 -40°C to +125°C LM7806CT LM7808CT LM7809CT LM7810CT LM7812CT LM7815CT LM7818CT LM7824CT LM7805ACT ± 2% 0°C to +125°C LM7806ACT LM7808ACT LM7809ACT LM7810ACT LM7812ACT LM7815ACT LM7818ACT LM7824ACT 2 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Block Diagram Figure 1. Pin Assignment Figure 2. Absolute Maximum Ratings Absolute maximum ratings are those values beyond which damage to the device may occur. The datasheet specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside datasheet specifications. Symbol Parameter Value Unit V I Input Voltage V O = 5V to 18V 35 V V O = 24V 40 V R θ JC Thermal Resistance Junction-Cases (TO-220) 5 °C/W R θ JA Thermal Resistance Junction-Air (TO-220) 65 °C/W T OPR Operating Temperature Range LM78xx -40 to +125 °C LM78xxA 0 to +125 T STG Storage Temperature Range -65 to +150 °C Starting Circuit Input 1 Reference Voltage Current Generator SOA Protection Thermal Protection Series Pass Element Error Amplifier Output 3 GND 2 1 1. Input 2. GND 3. Output GND TO-220 3 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7805) Refer to the test circuits. -40°C < T J < 125°C, I O = 500mA, V I = 10V, C I = 0.1 µ F, unless otherwise specified. Notes: 1. Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty is used. 2. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Unit V O Output Voltage T J = +25°C 4.8 5.0 5.2 V 5mA ≤ I O ≤ 1A, P O ≤ 15W, V I = 7V to 20V 4.75 5.0 5.25 Regline Line Regulation (1) T J = +25°C V O = 7V to 25V – 4.0 100 mV V I = 8V to 12V – 1.6 50.0 Regload Load Regulation (1) T J = +25°C I O = 5mA to 1.5A – 9.0 100 mV I O = 250mA to 750mA – 4.0 50.0 I Q Quiescent Current T J = +25°C – 5.0 8.0 mA ∆ I Q Quiescent Current Change I O = 5mA to 1A – 0.03 0.5 mA V I = 7V to 25V – 0.3 1.3 ∆ V O / ∆ T Output Voltage Drift (2) I O = 5mA – -0.8 – mV/°C V N Output Noise Voltage f = 10Hz to 100kHz, T A = +25°C – 42.0 – µ V/V O RR Ripple Rejection (2) f = 120Hz, V O = 8V to 18V 62.0 73.0 – dB V DROP Dropout Voltage I O = 1A, T J = +25°C – 2.0 – V r O Output Resistance (2) f = 1kHz – 15.0 – m Ω I SC Short Circuit Current V I = 35V, T A = +25°C – 230 – mA I PK Peak Current (2) T J = +25°C – 2.2 – A 4 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7806) (Continued) Refer to the test circuits. -40°C < T J < 125°C, I O = 500mA, V I = 11V, C I = 0.33 µ F, C O = 0.1 µ F, unless otherwise specified. Notes: 3. Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty is used. 4. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min Typ. Max. Unit V O Output Voltage T J = +25°C 5.75 6.0 6.25 V 5mA ≤ I O ≤ 1A, P O ≤ 15W, V I = 8.0V to 21V 5.7 6.0 6.3 Regline Line Regulation (3) T J = +25°C V I = 8V to 25V – 5.0 120 mV V I = 9V to 13V – 1.5 60.0 Regload Load Regulation (3) T J = +25°C I O = 5mA to 1.5A – 9.0 120 mV I O = 250mA to 750mA – 3.0 60.0 I Q Quiescent Current T J = +25°C – 5.0 8.0 mA ∆ I Q Quiescent Current Change I O = 5mA to 1A – – 0.5 mA V I = 8V to 25V – – 1.3 ∆ V O / ∆ T Output Voltage Drift (4) I O = 5mA – -0.8 – mV/°C V N Output Noise Voltage f = 10Hz to 100kHz, T A = +25°C – 45.0 – µ V/V O RR Ripple Rejection (4) f = 120Hz, V O = 8V to 18V 62.0 73.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(4) f = 1kHz – 19.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(4) TJ = +25°C – 2.2 – A 5 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7808) (Continued) Refer to the test circuits. -40°C < TJ < 125°C, IO = 500mA, VI = 14V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 5. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 6. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Unit VO Output Voltage TJ = +25°C 7.7 8.0 8.3 V 5mA ≤ IO ≤ 1A, PO ≤ 15W, VI = 10.5V to 23V 7.6 8.0 8.4 Regline Line Regulation(5) TJ = +25°C VI = 10.5V to 25V – 5.0 160 mV VI = 11.5V to 17V – 2.0 80.0 Regload Load Regulation(5) TJ = +25°C IO = 5mA to 1.5A – 10.0 160 mV IO = 250mA to 750mA – 5.0 80.0 IQ Quiescent Current TJ = +25°C – 5.0 8.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – 0.05 0.5 mA VI = 10.5V to 25V – 0.5 1.0 ∆VO/∆T Output Voltage Drift(6) IO = 5mA – -0.8 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 52.0 – µV/VO RR Ripple Rejection(6) f = 120Hz, VO = 11.5V to 21.5V 56.0 73.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(6) f = 1kHz – 17.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 230 – mA IPK Peak Current(6) TJ = +25°C – 2.2 – A 6 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7809) (Continued) Refer to the test circuits. -40°C < TJ < 125°C, IO = 500mA, VI = 15V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 7. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 8. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Unit VO Output Voltage TJ = +25°C 8.65 9.0 9.35 V 5mA ≤ IO ≤ 1A, PO ≤ 15W, VI = 11.5V to 24V 8.6 9.0 9.4 Regline Line Regulation(7) TJ = +25°C VI = 11.5V to 25V – 6.0 180 mV VI = 12V to 17V – 2.0 90.0 Regload Load Regulation(7) TJ = +25°C IO = 5mA to 1.5A – 12.0 180 mV IO = 250mA to 750mA – 4.0 90.0 IQ Quiescent Current TJ = +25°C – 5.0 8.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 11.5V to 26V – – 1.3 ∆VO/∆T Output Voltage Drift(8) IO = 5mA – -1.0 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 58.0 – µV/VO RR Ripple Rejection(8) f = 120Hz, VO = 13V to 23V 56.0 71.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(8) f = 1kHz – 17.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(8) TJ = +25°C – 2.2 – A 7 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7810) (Continued) Refer to the test circuits. -40°C < TJ < 125°C, IO = 500mA, VI = 16V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 9. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 10. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Unit VO Output Voltage TJ = +25°C 9.6 10.0 10.4 V 5mA ≤ IO ≤ 1A, PO ≤ 15W, VI = 12.5V to 25V 9.5 10.0 10.5 Regline Line Regulation(9) TJ = +25°C VI = 12.5V to 25V – 10.0 200 mV VI = 13V to 25V – 3.0 100 Regload Load Regulation(9) TJ = +25°C IO = 5mA to 1.5A – 12.0 200 mV IO = 250mA to 750mA – 4.0 400 IQ Quiescent Current TJ = +25°C – 5.1 8.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 12.5V to 29V – – 1.0 ∆VO/∆T Output Voltage Drift(10) IO = 5mA – -1.0 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 58.0 – µV/VO RR Ripple Rejection(10) f = 120Hz, VO = 13V to 23V 56.0 71.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(10) f = 1kHz – 17.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(10) TJ = +25°C – 2.2 – A 8 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7812) (Continued) Refer to the test circuits. -40°C < TJ < 125°C, IO = 500mA, VI = 19V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 11. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 12. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Unit VO Output Voltage TJ = +25°C 11.5 12.0 12.5 V 5mA ≤ IO ≤ 1A, PO ≤ 15W, VI = 14.5V to 27V 11.4 12.0 12.6 Regline Line Regulation(11) TJ = +25°C VI = 14.5V to 30V – 10.0 240 mV VI = 16V to 22V – 3.0 120 Regload Load Regulation(11) TJ = +25°C IO = 5mA to 1.5A – 11.0 240 mV IO = 250mA to 750mA – 5.0 120 IQ Quiescent Current TJ = +25°C – 5.1 8.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – 0.1 0.5 mA VI = 14.5V to 30V – 0.5 1.0 ∆VO/∆T Output Voltage Drift(12) IO = 5mA – -1.0 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 76.0 – µV/VO RR Ripple Rejection(12) f = 120Hz, VI = 15V to 25V 55.0 71.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(12) f = 1kHz – 18.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 230 – mA IPK Peak Current(12) TJ = +25°C – 2.2 – A 9 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7815) (Continued) Refer to the test circuits. -40°C < TJ < 125°C, IO = 500mA, VI = 23V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 13. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 14. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Unit VO Output Voltage TJ = +25°C 14.4 15.0 15.6 V 5mA ≤ IO ≤ 1A, PO ≤ 15W, VI = 17.5V to 30V 14.25 15.0 15.75 Regline Line Regulation(13) TJ = +25°C VI = 17.5V to 30V – 11.0 300 mV VI = 20V to 26V – 3.0 150 Regload Load Regulation(13) TJ = +25°C IO = 5mA to 1.5A – 12.0 300 mV IO = 250mA to 750mA – 4.0 150 IQ Quiescent Current TJ = +25°C – 5.2 8.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 17.5V to 30V – – 1.0 ∆VO/∆T Output Voltage Drift(14) IO = 5mA – -1.0 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 90.0 – µV/VO RR Ripple Rejection(14) f = 120Hz, VI = 18.5V to 28.5V 54.0 70.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(14) f = 1kHz – 19.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(14) TJ = +25°C – 2.2 – A 10 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7818) (Continued) Refer to the test circuits. -40°C < TJ < 125°C, IO = 500mA, VI = 27V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 15. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 16. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Unit VO Output Voltage TJ = +25°C 17.3 18.0 18.7 V 5mA ≤ IO ≤ 1A, PO ≤ 15W, VI = 21V to 33V 17.1 18.0 18.9 Regline Line Regulation(15) TJ = +25°C VI = 21V to 33V – 15.0 360 mV VI = 24V to 30V – 5.0 180 Regload Load Regulation(15) TJ = +25°C IO = 5mA to 1.5A – 15.0 360 mV IO = 250mA to 750mA – 5.0 180 IQ Quiescent Current TJ = +25°C – 5.2 8.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 21V to 33V – – 1.0 ∆VO/∆T Output Voltage Drift(16) IO = 5mA – -1.0 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 110 – µV/VO RR Ripple Rejection(16) f = 120Hz, VI = 22V to 32V 53.0 69.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(16) f = 1kHz – 22.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(16) TJ = +25°C – 2.2 – A 11 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7824) (Continued) Refer to the test circuits. -40°C < TJ < 125°C, IO = 500mA, VI = 33V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 17. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 18. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Unit VO Output Voltage TJ = +25°C 23.0 24.0 25.0 V 5mA ≤ IO ≤ 1A, PO ≤ 15W, VI = 27V to 38V 22.8 24.0 25.25 Regline Line Regulation(17) TJ = +25°C VI = 27V to 38V – 17.0 480 mV VI = 30V to 36V – 6.0 240 Regload Load Regulation(17) TJ = +25°C IO = 5mA to 1.5A – 15.0 480 mV IO = 250mA to 750mA – 5.0 240 IQ Quiescent Current TJ = +25°C – 5.2 8.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – 0.1 0.5 mA VI = 27V to 38V – 0.5 1.0 ∆VO/∆T Output Voltage Drift(18) IO = 5mA – -1.5 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 60.0 – µV/VO RR Ripple Rejection(18) f = 120Hz, VI = 28V to 38V 50.0 67.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(18) f = 1kHz – 28.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 230 – mA IPK Peak Current(18) TJ = +25°C – 2.2 – A 12 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7805A) (Continued) Refer to the test circuits. 0°C < TJ < 125°C, IO = 1A, VI = 10V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 19. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 20. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Unit VO Output Voltage TJ = +25°C 4.9 5.0 5.1 V IO = 5mA to 1A, PO ≤ 15W, VI = 7.5V to 20V 4.8 5.0 5.2 Regline Line Regulation(19) VI = 7.5V to 25V, IO = 500mA – 5.0 50.0 mV VI = 8V to 12V – 3.0 50.0 TJ = +25°C VI = 7.3V to 20V – 5.0 50.0 VI = 8V to 12V – 1.5 25.0 Regload Load Regulation(19) TJ = +25°C, IO = 5mA to 1.5A – 9.0 100 mV IO = 5mA to 1A – 9.0 100 IO = 250mA to 750mA – 4.0 50.0 IQ Quiescent Current TJ = +25°C – 5.0 6.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 8V to 25V, IO = 500mA – – 0.8 VI = 7.5V to 20V, TJ = +25°C – – 0.8 ∆VO/∆T Output Voltage Drift(20) IO = 5mA – -0.8 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 10.0 – µV/VO RR Ripple Rejection(20) f = 120Hz, IO = 500mA, VI = 8V to 18V – 68.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(20) f = 1kHz – 17.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(20) TJ = +25°C – 2.2 – A 13 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7806A) (Continued) Refer to the test circuits. 0°C < TJ < 125°C, IO = 1A, VI = 11V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 21. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 22. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Unit VO Output Voltage TJ = +25°C 5.58 6.0 6.12 V IO = 5mA to 1A, PO ≤ 15W, VI = 8.6V to 21V 5.76 6.0 6.24 Regline Line Regulation(21) VI = 8.6V to 25V, IO = 500mA – 5.0 60.0 mV VI = 9V to 13V – 3.0 60.0 TJ = +25°C VI = 8.3V to 21V – 5.0 60.0 VI = 9V to 13V – 1.5 30.0 Regload Load Regulation(21) TJ = +25°C, IO = 5mA to 1.5A – 9.0 100 mV IO = 5mA to 1A – 9.0 100 IO = 250mA to 750mA – 5.0 50.0 IQ Quiescent Current TJ = +25°C – 4.3 6.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 19V to 25V, IO = 500mA – – 0.8 VI = 8.5V to 21V, TJ = +25°C – – 0.8 ∆VO/∆T Output Voltage Drift(22) IO = 5mA – -0.8 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 10.0 – µV/VO RR Ripple Rejection(22) f = 120Hz, IO = 500mA, VI = 9V to 19V – 65.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(22) f = 1kHz – 17.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(22) TJ = +25°C – 2.2 – A 14 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7808A) (Continued) Refer to the test circuits. 0°C < TJ < 125°C, IO = 1A, VI = 14V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 23. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 24. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Unit VO Output Voltage TJ = +25°C 7.84 8.0 8.16 V IO = 5mA to 1A, PO ≤ 15W, VI = 10.6V to 23V 7.7 8.0 8.3 Regline Line Regulation(23) VI = 10.6V to 25V, IO = 500mA – 6.0 80.0 mV VI = 11V to 17V – 3.0 80.0 TJ = +25°C VI = 10.4V to 23V – 6.0 80.0 VI = 11V to 17V – 2.0 40.0 Regload Load Regulation(23) TJ = +25°C, IO = 5mA to 1.5A – 12.0 100 mV IO = 5mA to 1A – 12.0 100 IO = 250mA to 750mA – 5.0 50.0 IQ Quiescent Current TJ = +25°C – 5.0 6.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 11V to 25V, IO = 500mA – – 0.8 VI = 10.6V to 23V, TJ = +25°C – – 0.8 ∆VO/∆T Output Voltage Drift(24) IO = 5mA – -0.8 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 10.0 – µV/VO RR Ripple Rejection(24) f = 120Hz, IO = 500mA, VI = 11.5V to 21.5V – 62.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(24) f = 1kHz – 18.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(24) TJ = +25°C – 2.2 – A 15 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7809A) (Continued) Refer to the test circuits. 0°C < TJ < 125°C, IO = 1A, VI = 15V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 25. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 26. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Units VO Output Voltage TJ = +25°C 8.82 9.0 9.16 V IO = 5mA to 1A, PO ≤ 15W, VI = 11.2V to 24V 8.65 9.0 9.35 Regline Line Regulation(25) VI = 11.7V to 25V, IO = 500mA – 6.0 90.0 mV VI = 12.5V to 19V – 4.0 45.0 TJ = +25°C VI = 11.5V to 24V – 6.0 90.0 VI = 12.5V to 19V – 2.0 45.0 Regload Load Regulation(25) TJ = +25°C, IO = 5mA to 1.5A – 12.0 100 mV IO = 5mA to 1A – 12.0 100 IO = 250mA to 750mA – 5.0 50.0 IQ Quiescent Current TJ = +25°C – 5.0 6.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 12V to 25V, IO = 500mA – – 0.8 VI = 11.7V to 25V, TJ = +25°C – – 0.8 ∆VO/∆T Output Voltage Drift(26) IO = 5mA – -1.0 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 10.0 – µV/VO RR Ripple Rejection(26) f = 120Hz, IO = 500mA, VI = 12V to 22V – 62.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(26) f = 1kHz – 17.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(26) TJ = +25°C – 2.2 – A 16 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7810A) (Continued) Refer to the test circuits. 0°C < TJ < 125°C, IO = 1A, VI = 16V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 27. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 28. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Units VO Output Voltage TJ = +25°C 9.8 10.0 10.2 V IO = 5mA to 1A, PO ≤ 15W, VI = 12.8V to 25V 9.6 10.0 10.4 Regline Line Regulation(27) VI = 12.8V to 26V, IO = 500mA – 8.0 100 mV VI = 13V to 20V – 4.0 50.0 TJ = +25°C VI = 12.5V to 25V – 8.0 100 VI = 13V to 20V – 3.0 50.0 Regload Load Regulation(27) TJ = +25°C, IO = 5mA to 1.5A – 12.0 100 mV IO = 5mA to 1A – 12.0 100 IO = 250mA to 750mA – 5.0 50.0 IQ Quiescent Current TJ = +25°C – 5.0 6.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 12.8V to 25V, IO = 500mA – – 0.8 VI = 13V to 26V, TJ = +25°C – – 0.5 ∆VO/∆T Output Voltage Drift(28) IO = 5mA – -1.0 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 10.0 – µV/VO RR Ripple Rejection(28) f = 120Hz, IO = 500mA, VI = 14V to 24V – 62.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(28) f = 1kHz – 17.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(28) TJ = +25°C – 2.2 – A 17 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7812A) (Continued) Refer to the test circuits. 0°C < TJ < 125°C, IO = 1A, VI = 19V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Note: 29. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 30. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Units VO Output Voltage TJ = +25°C 11.75 12.0 12.25 V IO = 5mA to 1A, PO ≤ 15W, VI = 14.8V to 27V 11.5 12.0 12.5 Regline Line Regulation(29) VI = 14.8V to 30V, IO = 500mA – 10.0 120 mV VI = 16V to 22V – 4.0 120 TJ = +25°C VI = 14.5V to 27V – 10.0 120 VI = 16V to 22V – 3.0 60.0 Regload Load Regulation(29) TJ = +25°C, IO = 5mA to 1.5A – 12.0 100 mV IO = 5mA to 1A – 12.0 100 IO = 250mA to 750mA – 5.0 50.0 IQ Quiescent Current TJ = +25°C – 5.1 6.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 14V to 27V, IO = 500mA – – 0.8 VI = 15V to 30V, TJ = +25°C – – 0.8 ∆VO/∆T Output Voltage Drift(30) IO = 5mA – -1.0 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 10.0 – µV/VO RR Ripple Rejection(30) f = 120Hz, IO = 500mA, VI = 14V to 24V – 60.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(30) f = 1kHz – 18.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(30) TJ = +25°C – 2.2 – A 18 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7815A) (Continued) Refer to the test circuits. 0°C < TJ < 125°C, IO = 1A, VI = 23V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 31. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 32. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Units VO Output Voltage TJ = +25°C 14.75 15.0 15.3 V IO = 5mA to 1A, PO ≤ 15W, VI = 17.7V to 30V 14.4 15.0 15.6 Regline Line Regulation(31) VI = 17.4V to 30V, IO = 500mA – 10.0 150 mV VI = 20V to 26V – 5.0 150 TJ = +25°C VI = 17.5V to 30V – 11.0 150 VI = 20V to 26V – 3.0 75.0 Regload Load Regulation(31) TJ = +25°C, IO = 5mA to 1.5A – 12.0 100 mV IO = 5mA to 1A – 12.0 100 IO = 250mA to 750mA – 5.0 50.0 IQ Quiescent Current TJ = +25°C – 5.2 6.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 17.5V to 30V, IO = 500mA – – 0.8 VI = 17.5V to 30V, TJ = +25°C – – 0.8 ∆VO/∆T Output Voltage Drift(32) IO = 5mA – -1.0 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 10.0 – µV/VO RR Ripple Rejection(32) f = 120Hz, IO = 500mA, VI = 18.5V to 28.5V – 58.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(32) f = 1kHz – 19.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(32) TJ = +25°C – 2.2 – A 19 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7818A) (Continued) Refer to the test circuits. 0°C < TJ < 125°C, IO = 1A, VI = 27V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 33. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 34. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Units VO Output Voltage TJ = +25°C 17.64 18.0 18.36 V IO = 5mA to 1A, PO ≤ 15W, VI = 21V to 33V 17.3 18.0 18.7 Regline Line Regulation(33) VI = 21V to 33V, IO = 500mA – 15.0 180 mV VI = 21V to 33V – 5.0 180 TJ = +25°C VI = 20.6V to 33V – 15.0 180 VI = 24V to 30V – 5.0 90.0 Regload Load Regulation(33) TJ = +25°C, IO = 5mA to 1.5A – 15.0 100 mV IO = 5mA to 1A – 15.0 100 IO = 250mA to 750mA – 7.0 50.0 IQ Quiescent Current TJ = +25°C – 5.2 6.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 12V to 33V, IO = 500mA – – 0.8 VI = 12V to 33V, TJ = +25°C – – 0.8 ∆VO/∆T Output Voltage Drift(34) IO = 5mA – -1.0 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 10.0 – µV/VO RR Ripple Rejection(34) f = 120Hz, IO = 500mA, VI = 22V to 32V – 57.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(34) f = 1kHz – 19.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(34) TJ = +25°C – 2.2 – A 20 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Electrical Characteristics (LM7824A) (Continued) Refer to the test circuits. 0°C < TJ < 125°C, IO = 1A, VI = 33V, CI = 0.33µF, CO = 0.1µF, unless otherwise specified. Notes: 35. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty is used. 36. These parameters, although guaranteed, are not 100% tested in production. Symbol Parameter Conditions Min. Typ. Max. Units VO Output Voltage TJ = +25°C 23.5 24.0 24.5 V IO = 5mA to 1A, PO ≤ 15W, VI = 27.3V to 38V 23.0 24.0 25.0 Regline Line Regulation(35) VI = 27V to 38V, IO = 500mA – 18.0 240 mV VI = 21V to 33V – 6.0 240 TJ = +25°C VI = 26.7V to 38V – 18.0 240 VI = 30V to 36V – 6.0 120 Regload Load Regulation(35) TJ = +25°C, IO = 5mA to 1.5A – 15.0 100 mV IO = 5mA to 1A – 15.0 100 IO = 250mA to 750mA – 7.0 50.0 IQ Quiescent Current TJ = +25°C – 5.2 6.0 mA ∆IQ Quiescent Current Change IO = 5mA to 1A – – 0.5 mA VI = 27.3V to 38V, IO = 500mA – – 0.8 VI = 27.3V to 38V, TJ = +25°C – – 0.8 ∆VO/∆T Output Voltage Drift(36) IO = 5mA – -1.5 – mV/°C VN Output Noise Voltage f = 10Hz to 100kHz, TA = +25°C – 10.0 – µV/VO RR Ripple Rejection(36) f = 120Hz, IO = 500mA, VI = 28V to 38V – 54.0 – dB VDROP Dropout Voltage IO = 1A, TJ = +25°C – 2.0 – V rO Output Resistance(36) f = 1kHz – 20.0 – mΩ ISC Short Circuit Current VI = 35V, TA = +25°C – 250 – mA IPK Peak Current(36) TJ = +25°C – 2.2 – A 21 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Typical Performance Characteristics Figure 3. Quiescent Current Figure 4. Peak Output Current Figure 5. Output Voltage Figure 6. Quiescent Current 6 5.75 5.5 5.25 5 4.75 4.5 VI = 10V VO = 5V IO = 5mA -25-50 0 025 50 75 100 125 Q U IE S C E N T C U R R E N T (m A ) JUNCTION TEMPERATURE (°C) 3 2.5 2 1.5 1 .5 0 TJ = 25°C ∆VO = 100mV 5 10 15 20 25 30 35 O U T P U T C U R R E N T (A ) INPUT-OUTPUT DIFFERENTIAL (V) 1.02 1.01 1 0.99 0.98 VI – VO = 5V IO = 5mA -25-50 0 25 50 75 100 125 N O R M A LI Z E D O U T P U T V O LT A G E (V ) JUNCTION TEMPERATURE (°C) 7 6.5 6 5.5 5 4.5 4 TJ = 25°C VO = 5V IO = 10mA 105 15 20 25 30 35 Q U IE S C E N T C U R R E N T (m A ) INPUT VOLTAGE (V) 22 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Typical Applications Figure 7. DC Parameters Figure 8. Load Regulation Figure 9. Ripple Rejection 0.1µFCOCI 0.33µF OutputInput LM78XX 1 3 2 LM78XX 3 2 1 0.33µF 270pF 100Ω 30µS RL 2N6121 or EQ OutputInput VO 0V VO LM78XX OutputInput 5.1Ω 0.33µF 2 31 RL 470µF 120Hz + 23 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Figure 10. Fixed Output Regulator Figure 11. Figure 12. Circuit for Increasing Output Voltage 0.1µFCOCI 0.33µF OutputInput LM78XX 1 3 2 0.1µFCOCI 0.33µF Output Input LM78XX 1 3 2 VXX R1 RL IQ IO IO = R1 + IQ VXX Notes: 1. To specify an output voltage, substitute voltage value for “XX.” A common ground is required between the input and the output voltage. The input voltage must remain typically 2.0V above the output voltage even during the low point on the input ripple voltage. 2. CI is required if regulator is located an appreciable distance from power supply filter. 3. CO improves stability and transient response. 0.1µFCOCI 0.33µF Output Input LM78XX 1 3 2 VXX R1 R2 IQ IRI ≥ 5 IQ VO = VXX(1 + R2 / R1) + IQR2 24 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Figure 13. Adjustable Output Regulator (7V to 30V) Figure 14. High Current Voltage Regulator Figure 15. High Output Current with Short Circuit Protection LM741 - + 2 3 6 4 2 31 0.33µFCI Input Output 0.1µF CO LM7805 10kΩ IRI ≥ 5 IQ VO = VXX(1 + R2 / R1) + IQR2 3 2 1 LM78XX Output Input R1 3Ω 0.33µF IREG 0.1µF IO IQ1 IO = IREG + BQ1 (IREG–VBEQ1/R1) Q1 BD536 R1 = VBEQ1 IREG–IQ1 BQ1 LM78XX Output 0.1µF0.33µF R1 3Ω 3 2 1 Q1Input Q2 Q1 = TIP42 Q2 = TIP42 RSC = I SC VBEQ2 RSC 25 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Figure 16. Tracking Voltage Regulator Figure 17. Split Power Supply (±15V – 1A) LM78XX LM741 0.1µF0.33µF 1 2 3 7 2 6 4 3 4.7kΩ 4.7kΩ TIP42 COMMON COMMON VO -VO VI -VIN _ + 31 2 1 32 0.33µF 0.1µF 2.2µF 1µF + + 1N4001 1N4001 +15V -15V +20V -20V LM7815 MC7915 26 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Figure 18. Negative Output Voltage Circuit Figure 19. Switching Regulator LM78XX Output Input + 1 2 0.1µF 3 LM78XX 1mH 31 2 2000µF OutputInput D45H11 0.33µF 470Ω 4.7Ω 10µF 0.5Ω Z1 + + 27 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Mechanical Dimensions Dimensions in millimeters 4.50 ±0.209.90 ±0.20 1.52 ±0.10 0.80 ±0.10 2.40 ±0.20 10.00 ±0.20 1.27 ±0.10 ø3.60 ±0.10 (8.70) 2. 80 ±0 .1 0 15 .9 0 ±0 .2 0 10 .0 8 ±0 .3 0 18 .9 5M AX . (1. 70 ) (3. 70 ) (3. 00 ) (1. 46 ) (1. 00 ) (45 °) 9. 20 ±0 .2 0 13 .0 8 ±0 .2 0 1. 30 ±0 .1 0 1.30 +0.10 –0.05 0.50 +0.10 –0.05 2.54TYP [2.54 ±0.20] 2.54TYP [2.54 ±0.20] TO-220 28 www.fairchildsemi.com LM78XX/LM78XXA Rev. 1.0 LM 78XX/LM 78XXA 3-Term inal 1A P o sitive V oltag e R egulator Rev. I19 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILDíS WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILDíS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms ACEx™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT™ FAST® FASTr™ FPS™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ i-Lo™ ImpliedDisconnect™ IntelliMAX™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ ScalarPump™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TCM™ TinyLogic® TINYOPTO™ TruTranslation™ UHC™ UniFET™ UltraFET® VCX™ Wire™ FACT Quiet Series™ Across the board. Around the world.™ The Power Franchise® Programmable Active Droop™ Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ANEXO B • Partes del ojo humano - Cristalino: es una lente flexible biconvexa, es decir convergente, que puede modificar su forma para enfocar las imágenes en la retina. Esta modificación la realizan los músculos filiares. - Iris: es un diafragma que regula la entrada de luz mediante la variación del diámetro de la pupila. - Retina: es la capa fotosensible. Contiene una delicada película de fibras nerviosas que divergen del nervio óptico y terminan en unas neuronas con forma de conos y bastones que mediante un proceso fotoquímico transforman los estímulos luminosos en impulsos sensoriales. - Conos y bastones: los primeros están dedicados a la distinción de los colores, mientras que los bastones sólo perciben la luz sin distinguir los colores; sin embargo su sensibilidad se incrementa notablemente bajo niveles de iluminación débiles, mientras que los conos no funcionan en esas circunstancias. Los conos son sensibles a los colores, permitiendo la discriminación de los detalles finos, se encuentran concentrados en la fóvea, que es un área de 0.3 mm. de diámetro y aquí el ojo centra la imagen del objeto que debe ser examinado minuciosamente. Los bastones son los responsables de la visión a bajos niveles de iluminación; están distribuidos por toda la retina, y aumentan a medida que nos alejamos de ella. - Nervio óptico: está formado por las fibras nerviosas, que conducen las señales recibidas por los conoces y bastones al cerebro. - Humor acuoso y humor vítreo: son los líquidos transparentes que llenan las cámaras anterior y posterior al cristalino respectivamente. - Párpados y pestañas: sirven como sistema de protección. - Figura B.1.1 Partes del ojo humano [11] • Visión humana [12] El funcionamiento del ojo humano produce lo que conocemos como visión humana, mediante las siguientes etapas: La luz entra en el ojo a través de la pupila y es refractada para enfocarla en la retina. La refracción ocurre cuando la luz pasa a través de la córnea, el humor acuoso, el cristalino y el humor vítreo en su camino hasta la retina. La capa más interna de la retina contiene los bastones y los conos, que son las células fotorreceptoras del ojo, quienes responden al estímulo luminoso mediante la producción de un impulso nervioso. Los bastones y conos sinaptan con las neuronas de las capas bipolar y ganglionar de la retina. Las señales nerviosas abandonan la retina y salen del ojo por el nervio óptico, en la superficie posterior del globo ocular. Después de salir del ojo, el nervio óptico entra en el encéfalo y llega hasta la corteza visual del lóbulo occipital. En esa zona, la interpretación visual de los impulsos generados por los estímulos luminosos en los bastones y los conos de la retina produce la visión. Figura B.1.2 Partes de la retina [12] • Campo visual [11] El campo visual puede dividirse en zonas con distinta calidad de visión, en función del ángulo de apertura con relación a la línea de visión: - Zona de visibilidad precisa: corresponde a un ángulo de apertura de 1°. - Zona de visibilidad media: formada por un ángulo de 40°, se ven los movimientos de los objetos, los contrastes fuertes y puede desplazarse la mirada entre objetos de modo fácil. - Zona periférica: comprendida entre los 40° y 70°, solo se percibe l os objetos en movimiento y las luminancias muy contrastadas. Figura B.1.3 Campo visual [12] • Características del campo visual nóAcomodaci - Es la capacidad del ojo para enfocar los objetos situados a distancias variables. Para que un objeto se distinga con precisión es necesario que su imagen se produzca sobre la retina; para conseguirlo los músculos filiares modifican la convexidad del cristalino. Los objetos lejanos requieren una disminución en la curvatura del cristalino que lo convierta en menos convergente para los objetos próximos la curvatura es opuesta. La velocidad y precisión en la acomodación aumentan con el nivel de iluminación y con el contraste entre el objeto observado y el fondo. - Agudeza visual Es el poder de resolución del ojo, es decir la aptitud para percibir los detalles más pequeños de los objetos, la posibilidad de ver los puntos muy próximos y de apreciar los contornos y formas. Aumenta con el nivel de iluminación y el contraste. - Velocidad de percepción Es el tiempo transcurrido desde que un objeto esta dentro del campo visual hasta que es percibido por el cerebro. Aumenta con el nivel de iluminación y con el contraste. - Sensibilidad a los contrastes Es la aptitud visual de apreciar las distancias entre puntos situados en planos diferentes, logrados mediante: - La comparación de las dimensiones de los objetos. - El paralelaje de movimientos. Moviendo los ojos, los objetos más cercanos se mueven más rápidamente que los alejados. - La visión binocular, obtenida gracias a la interpretación por parte del cerebro de las imágenes en ambos ojos. ANEXO C Se muestran las subrutinas utilizadas en el programa principal: Figura C.1.1 Diagrama de flujo de subrutina configurar_puertos Figura C.1.2 Diagrama de flujo de subrutina configurar_ADC Figura C.1.3 Diagrama de flujo de subrutina direccionar_EEPROM Figura C.1.4 Diagrama de flujo de subrutina configurar_LCD Figura C.1.5 Diagrama de flujo de subrutina lee_EEPROM Figura C.1.6 Diagrama de flujo de subrutina limpia_pantalla Figura C.1.7 Diagrama de flujo de subrutina CheckBF Figura C.1.8 Diagrama de flujo de subrutina imprime_mensaje ANEXO D • Instrucción de selección de origen de reproducción El programa solicita al usuario seleccionar la ubicación del efecto a reproducir, ya sea reproducir algún efecto pregrabado (el cuál no es posible modificarlo) o grabado (por el mismo usuario). Figura D.1.1 Instrucción de selección de origen de reproducción en el display LCD del simulador • Instrucción de selección de ubicación para reproducción El programa solicita al usuario seleccionar la ubicación del efecto a reproducir, luego de haber seleccionado su origen (pregrabado o grabado), si el origen es pregrabado existen 3 posibles selecciones, en caso contrario un máximo de 4 selecciones posibles. Figura D.1.2 Instrucción de selección de ubicación para reproducción en el display LCD del simulador • Pantalla de confirmación de selección Luego de haber seleccionado el efecto por el usuario, el display LCD muestra una pantalla, indicando cuál es la opción que ha elegido, para luego reproducirla. Figura D.1.3 Indicación de opción seleccionada en el display LCD del simulador • Pantalla de reproducción de efecto Esta pantalla es mostrada en el display LCD cuando se está reproduciendo algun efecto, ya se sea variación, como se muestra en la figura D.1.4, o en el caso de degradé. Figura D.1.4 Indicación de reproducción de efecto “variación” en el display LCD del simulador • Instrucción de selección de ubicación para grabación El programa solicita al usuario seleccionar la ubicación del efecto hacia donde se desea guardar, donde se cuenta con 4 ubicaciones posibles. Figura D.1.5 Instrucción de selección de ubicación para grabación en el display LCD del simulador • Instrucción de selección de intensidad de color El programa solicita al usuario seleccionar la intensidad de cada componente para cada led (rojo, verde y azul de cada led de potencia RGB), tanto las intensidades del color inicial, como del color final. Figura D.1.6 Instrucción de selección de intensidad de color en el display LCD del simulador • Pantalla de indicador de intensidad En esta pantalla se observa el grado de intensidad que el usuario le está asignando a cada componente de cada led, la cual va cambiando según se varie la interfaz asignada a esta función. Figura D.1.7 Indicación del nivel de intensidad asignado enel display LCD del simulador ANEXO E • Circuito de los subsistemas de control e interfaz Figura E.1.1 Diagrama esquemático de los subsistemas de control e interfaz Figura E.1.2 Diagrama de pistas de los subsistemas de control e interfaz Figura E.1.3 Diagrama de componentes de los subsistemas de control e interfaz Figura E.1.4 Implementación de los subsistemas de control e interfaz • Circuito del subsistema de actuación Figura E.1.5 Diagrama esquemático del subsistema de actuación Figura E.1.6 Diagrama de pistas del subsistema de actuación Figura E.1.7 Diagrama de componentes del subsistema de actuación Figura E.1.8 Implementación del subsistema de actuación • Circuito de leds de potencia RGB del prototipo Figura E.1.9 Diagrama esquemático del leds de potencia RGB del prototipo Figura E.1.10 Diagrama de pistas del leds de potencia RGB del prototipo Figura E.1.11 Diagrama de componentes del leds de potencia RGB del prototipo Figura E.1.12 Implementación de tarjeta de leds de potencia RGB del prototipo ANEXO F • Resultados Se muestran 2 ejemplos implementados adicionales para cada efecto de degradé. - Variación En las figuras F.1.1, F.1.2 y F.1.3 se muestran los colores del efecto N°2 implementado en el prototipo, donde el color in icial es amarillo y el final es rojo. Figura F.1.1 Color inicial en el efecto N°2 de variación Figura F.1.2 Color intermedio en el efecto N°2 de variación Figura F.1.3 Color final en el efecto N°2 de variación En las figuras F.1.4, F.1.5 y F.1.6 se muestran los colores del efecto N°3 implementado en el prototipo, donde el color in icial es azul y el final es verde. Figura F.1.4 Color inicial en el efecto N°3 de variación Figura F.1.5 Color intermedio en el efecto N°3 de variación Figura F.1.6 Color final en el efecto N°3 de variación - Degradé En las figuras F.1.7 y F.1.8 se muestran 2 ejemplos implementados en el prototipo. En la primera de ambas figuras, se ve el degradé entre los colores rojo y amarillo, teniendo al medio los colores rojo-anaranjado y naranja. Figura F.1.7 Efecto N°2 de degradé desde rojo a amarillo En la figura F.1.8 observamos el degradé entre el blanco y rojo, teniendo como colores intermedios rosado y fucsia. Figura F.1.8 Efecto N°3 de degradé desde blanco a rojo ANEXO G • Diseño de fuente switching para alimentación de diseño Según los requerimientos calculados en el capítulo 3, se necesita diseñar una fuente switching con salida múltiple (20.9V @ 6A y 5V @ 1A) con una potencia mínima total de 126.4W. Debido a que las fuentes switching poseen distintas topologías, es necesaria elegir una para realizar el diseño, para lo cuál se muestra un gráfico comparativo con relación a voltajes de entrada y potencia necesaria donde se muestra la topología recomendada para obtener una mejor eficiencia: Figura G.1.1 Gráfica para selección de topología según potencia y Ventrada [40] Del gráfico previo, ya que nuestro Ventrada es 220V y la potencia es 126.4W, podemos deducir que la mejor topología es Flyback. Esta topología se tiene como bloques de operación las mostradas en la figura G.1.2: Figura G.1.2 Esquema básico del flyback [41] Donde se observa una alimentación inicial DC, que se obtiene luego de variar la señal AC por un puente de diodos y condensadores. Vemos también el transformador, el cuál entregará la potencia desde un lado al otro mediante el almacenamiento de energía magnética. El circuito de control se encargará de decidir la operación del transformador mediante un interruptor, de manera que al estar cerrado, se acumule la energía en el lado primario, y al abrirse, toda esta energía se transfiera hacia el lado secundario. Finalmente, se utiliza un regulador y un condensador a la salida para estabilizar la señal. El presente diseño estará basado en el diseño realizado en el circuito de la figura G.1.3, adaptando los componentes a los requerimientos para poder entregar la potencia adecuada. Figura G.1.3 Circuito de fuente flyback a diseñar [42] A continuación, se diseñará paso a paso la fuente: 1. Especificaciones de diseño - Rango de voltaje de entrada: 180VAC – 260VAC @ 60Hz - Voltajes de salida: +20.9VDC @ 6A + 5VDC @ 1A - Voltaje de salida de rizado (deseado): 100mVpp 2. Consideraciones de prediseño - Potencia de salida total: )1)(5()6)(9.20( AVAVPSALIDA += )1735.0)(5()6)(9.20( AVAVPSALIDA += wattsPSALIDA 27.126= - Potencia de entrada (estimada): eficienciaPP SALIDAENTRADA /= )(8.0/27.126 asumidoPENTRADA = wattsPENTRADA 84.157= - Voltajes DC de entrada: )4142.1)(180()( VACV MENORENTRADA = VDCV MENORENTRADA 558.254)( = )4142.1)(260()( VACV MAYORENTRADA = VDCV MAYORENTRADA 695.367)( = - Corrientes de entrada promedio: 1. Corriente promedio mayor: )()( / MINENTRADAENTRADAMAXENTRADA VPI = VDCWI MAXENTRADA 558.254/ 84.157)( = AI MAXENTRADA 62.0)( = 2. Corriente promedio menor: )()( / MAXENTRADAENTRADAMINENTRADA VPI = VDCWI MAXENTRADA 695.367/ 84.157)( = AI MAXENTRADA 429.0)( = Como ya tenemos las corrientes, podemos seleccionar el calibre del cable adecuado, que según tabla AWG, es el #23. - Corriente pico estimada (lado primario) )(/5.5 MINENTRADASALIDAPICO VPI = ) 558.254/() 27.126(5.5 VDCWI PICO = ) 558.254/() 27.126(5.5 VDCWI PICO = AI PICO 73.2= - Tendrá salidas múltiples (20.9 VDC y 5 VDC). - La etapa de control de la fuente será realizada por el integrado UC3843P [43] a una frecuencia de 50Khz. (determinada de diseño), ya que este integrado es encontrado fácilmente en el mercado local. - El TAPAGADO se considerará el 30% de la inversa de la fop (criterio de diseño) [42], es decir 6us. - El valor de )(MAXδ (ciclo máximo de trabajo) se considerará 0.5 como criterio de diseño, ya que con este valor se reduce al mínimo las pérdidas en el MOSFET de la etapa de control [42]. 3. Diseño del transformador Para el diseño de transformador de la fuente conmutada, el núcleo más común es en forma de E-E. Para este nivel de potencia, el tamaño apropiado por lado es de 30 mm. por lado [42], este núcleo puede ser encontrado en Magnetics Inc. el número de parte F-43515-EC [44]. En su hoja técnica, nos brinda información importante para continuar el diseño, como el AC (área del núcleo) siendo 0.87 cm2, las pérdidas del núcleo de 232 mW/cm3, entre otros datos. - La inductancia primaria mínima requerida es: )50000)(73.2( )5.0)(558.254( . )()( A V fI V L PICO MAXMENORENTRADA PRIMARIA == δ HLPRIMARIA µ44.932= - El flujo de densidad máximo (BMAX) del núcleo se determinará mediante el gráfico de [42], ya que tenemos de dato la foperación y las pérdidas de núcleo. Entonces, mediante la figura G.1.4: Figura G.1.4 Gráfica para determinación de densidad de flujo [42] - De la figura previa, se puede observar que para unas pérdidas de núcleo de 232 mW/cm3 y una frecuencia de 50 Khz. se deduce que la BMAX es aproximadamente 2000 Gauss. - El entrehierro requerido para evitar la saturación del núcleo es: 22 8 2 8 ` )2000)(87.0( 10)73.2)(00093244.0)(4.0(10).4.0( GcmBA ILl MAXC PICOPRIMARIA OENTREHIERR pipi == cml OENTREHIERR 091.0= Comercialmente, el valor más cercano de longitud para este entrehierro es de 0.1734 cm. con una inductancia (AL) de 100mH/1000vueltas [44]. El núcleo con este entrehierro es F-43515-EC-02 en la empresa Magnetics Inc. - El número máximo de vueltas necesarias para el bobinado primario es: vueltas mH mH A L N L PRIMARIO PRIMARIO 56.96100 93244.010001000 === El cuál para fines de diseño se redondea a 97 vueltas. - El número de vueltas requeridas para la salida de 20.9V es: MAXMINIMOENTRADA MAXDIODOSALIDAPRIMARIO SECUNDARIO V VVN N ∂ ∂−+ = . )1)(( )( )5.0)(558.254( )5.01)(7.09.20)(97( V VVvueltasN SECUNDARIO −+ = vueltasN SECUNDARIO 23.8= Se redondea para fines prácticos a 8 vueltas. - Bajo el mismo análisis, el número de vueltas requeridas para la salida de 5V es: )5.0)(558.254( )5.01)(7.05)(97( V VVvueltasN SECUNDARIO −+ = vueltasN SECUNDARIO 17.2= Se redondea para fines prácticos a 2 vueltas. - Los cables a usar en cada bobinado serán (de tabla vf1): Primario: IMAX = 2.73A, #17 AWG, 1 hilo +20.9V: IMAX = 6A, #19 AWG, 4 hilos +5V: IMAX = 1A, #21 AWG, 1 hilo 4. Diseño del filtro de salida Hallamos la tensión inversa de los diodos D4 y D5 (VR) - Para la salida de +20.9V: )(MAXIMOENTRADA PRIMARIO SECUNDARIO SALIDAR VN NVV +> )965.367( 97 89.20 vueltas vueltasVR +> VVR 25.51> - Para la salida de +5V: )(MAXIMOENTRADA PRIMARIO SECUNDARIO SALIDAR VN NVV +> )965.367( 97 25 vueltas vueltasVR +> VVR 59.12> - Siguiendo el criterio de diseño: PROMEDIODIRECTA II > Para el caso de 20.9V debemos elegir un diodo rectificador que pueda soportar al menos 6A y trabaje a un voltaje mayor al calculado. Se elige el modelo MBR760 [45] pues cumple con dichos requerimientos. (IDIRECTA = 7.5A y VR=60V). Entonces D4=MBR760. Análogamente, en el caso de 5V debemos elegir un diodo rectificador que pueda soportar al menos 1A y trabaje a un voltaje mayor a 12.6V. Se elige el modelo MBR320 [46] pues cumple con dichos requerimientos. (IDIRECTA = 3A y VR=20V). Por lo que D5=MBR320. - Para determinar el valor mínimo de los condensadores filtros en la salidas, (C10 y C11) tenemos: Para la salida de +20.9V: )( )( deseadoRIZADO APAGADOSALIDA MINIMOSALIDA V TIC = mV sAC MINIMOSALIDA 100 )6)(6( )( µ = 10360)( CFC MINIMOSALIDA == µ Debido a que comercialmente ese valor no existe, mediante el arreglo en paralelo se pueden colocar 2 condensadores de 180uF @ 35V. Para la salida de +5V: )( )( deseadoRIZADO APAGADOSALIDA MINIMOSALIDA V TIC = mV sAC MINIMOSALIDA 100 )6)(1( )( µ = 1160)( CFC MINIMOSALIDA == µ Debido a que comercialmente ese valor no existe, mediante el arreglo en paralelo se pueden colocar 2 condensadores de 33uF @10V. 5. Diseño de la etapa de control - La alimentación para el controlador deberá ser mediante un circuito de ‘arranque y puesta en marcha’, pues no se puede alimentar directamente desde el VENTRADA, ya que es mucho mayor a los máximos permitidos, la función de este circuito es brindar una tensión estable para el controlador. Existen diversas configuraciones propuestas en [42], dentro de las cuales se seleccionará el siguiente circuito visto en la figura G.1.5: Figura G.1.5 Circuito para alimentación del controlador [42] Se empieza seleccionando el diodo zener, bajo el criterio de )(MINCCZENER VV > , el modelo 1N5241A [47] cumple el requerimiento (VZENER=12V y VCC(MIN) que según su H. T. es 11.5V). K mAI VV R MINZENER ZENERMINENTRADA 8.12 20 12558.2541 )( )( = − = − = K mAmA VV R ZENERMINENTRADA 08.8 30 12558.254 30 2 )( =−= − = Para la selección del transistor, se sigue el criterio: VCEO > VENTRADA(MAX), Ic = 30 mA, El transistor Q1 será MPSA44, ya que cumple dichas necesidades mencionadas previamente[52], el diodo D2 será el 1N4148 y el condensador de desacoplo C7 de 10uF. - Según la hoja técnica del controlador [43], se debe colocar un RT y un CT para determinar la frecuencia de oscilación (en nuestro caso, predeterminado a 50KHz.) TT CR f 72.1= Asumiendo un RT de 39K (R5), entonces para f=50KHz determinamos CT: )50)(39( 72.1 KHzK CT = 8822 CpFCT == - Ya que se utilizará un MOSFET como conmutador, se necesita seleccionarlo bajo el siguiente criterio: )()( DIODOSALIDA SECUNDARIO PRIMARIO MAXENTRADADSS VVN NVV ++> De la hoja técnica del MBR760 [45], se observa que el voltaje es de 0.75V, entonces hallando VDSS: )75.09.20( 8 97695.367 ++> VVDSS VVDSS 2.630> Y en cuanto a la corriente a soportar: PICOD II > AI D 73.2> Por lo que el MOSFET IRFB9N65A cumple los requisitos (VDSS=650V y ID=8.5A) tal como indica su hoja técnica [49]. - Como ya se indicó en la etapa de prediseño, se seleccionó el controlador UC3843P, pues es de fácil adquisición y es muy comúnmente utilizado para el control en fuentes switching. - El voltaje de lazo de realimentación debe estar aislado del voltaje de la línea de entrada, por lo que se requiere utilizar un opto-aislador. El modelo MOC8102 (Q3) será utilizado en esta etapa por ser de fácil adquisición y bajo consumo, según su hoja técnica. [50] Para mejorar los efectos de la regulación, debemos sensar la corriente en respuesta a los cambios de carga, para esto, nos ayudamos de un diodo de referencia (D6), en este caso de una referencia de precisión como el TL431CP. En la etapa de retroalimentación, la corriente es de 1mA para la salida del D3, por lo que el TL431CP debe permitir obtener dicha corriente a través del pin del controlador, entonces debemos de agregar un control de corriente para este propósito. De hoja técnica del opto-aislador [50], tenemos: Ω== K mA VR 1 0.1 0.1 10 El led para limitar la corriente del opto-aislador será: OPTO TLOPTOSALIDA I VVVR )( 43113 +− = K mA R 83.2 6 )5.24.1(9.20 13 = +− = Cambiamos R13 hacia su valor más cercano comercial, que es 2.7K. Ya que la corriente de sensado es de 1mA determinamos R17: K mA V I VR SENSADO TL 5.2 1 5.2431 17 === Igualmente cambiamos el valor de R17 a un valor comercial, en este caso 2.7K. Recalculando la ISENSADO con los valores actuales: 17 431 R V I TLSENSADO = K VI SENSADO 7.2 5.2 = mAI SENSADO 926.0= Ahora se debe asignar el grado de sensibilidad para cada salida, según la aplicación para la cuál es diseñada. Debido a que la salida de +20.9V alimentará unos leds de potencia RGB se requiere que la alimentación se de con una salida constante, por lo que se asignará una sensibilidad de 100%, y para el caso de la alimentación de la etapa de control (+5V), todos los componentes que lo conforman pueden soportar variaciones de ±1V, lo cual representa 20% en voltaje. 16 15))((% 431 RyR I VV R SENSADOADSENSIBILID TLSALIDA ADSENSIBILID = − = Entonces para la salida de +20.9V: K mA VVR 87.19)926.0(1 5.29.20 15 = − = , 2 resistencias de 10K Salida de +5V: K mA VVR 69.2)926.0)(2.01( 5.25 16 = − − = , 1 resistencia de 2.7K En la figura G.1.6 se observa el circuito de retroalimentación del circuito [42]: Figura G.1.6 Circuito de realimentación [42] - En el caso que el voltaje de entrada caiga por debajo del mínimo diseñado, puede hacer variar la etapa de control y así saltar a un ciclo de trabajo distinto al deseado, y de esta manera no controlar la salida, lo que ocasionaría una mala entrega de potencia a la carga, y consecuentemente malograr la fuente, así como la propia carga. Es por esto, que para evitar dicho posible inconveniente, se agrega un comparador de voltaje simple, para muestrear que la entrada este en el rango diseñado. El circuito de comparación se muestra en la figura G.1.7: Figura G.1.7 Circuito de comparación de entrada [42] Para el cuál, necesitamos utilizar un OPAMP (Q2), por lo que se escogerá el modelo LM111, ya que es de propósito general, además se observa que el valor de R7 es 1M, seguidamente se calcularán los valores de las resistencias de dicha configuración mediante: SENSADO REFERENCIAMINENTRADA I VV R − = )( 3 De la hoja técnica del controlador [43], obtenemos el VREFERENCIA=5V, reemplazando: K mA R 270 926.0 5558.254 3 = − = Determinando R2: SENSADO REFERENCIA I VR =4 K mA VR 4.5 926.0 5 4 == Determinando R3: 436 // RRR = KKR 4.5//2706 = KR 29.56 = El diodo de la salida del OPAMP (D3) hacia el pin de compensación será el modelo 1N4148 pues es para protección. - La resistencia de sensado de corriente en el MOSFET es según hoja técnica del UC3843P [43]: 12366.073.2 1 0.1 R A V I VR PICO SENSADO =Ω=== Adicionalmente, se recomienda adicionar un filtro pasa-bajo (FPB), con resistencia R11 de 1K y condensador C9 de 470uF. - En los pines 2 del controlador, según H.T. debe estar el voltaje de retroalimentación (VFB), que es igual al VCE en saturación del emisor del MOC8102, el cual es 0.4V [50], este será obtenido mediante el pin 8 VREF mediante un divisor de voltaje, tal como se sugiere en la figura G.1.8: Figura G.1.8 Divisor de voltaje para obtener VFB [42] Calculando los valores, con VREF=5V (dado por el pin 8) y VFB=0.4V, entonces: V V RR R 5 4.0 98 9 = + 895.11 RR = Entonces se asigna a R9=1K y R8=11.5K - Para compensar el diseño del lazo de retroalimentación, es necesario hacer su análisis en frecuencia, para ambas salidas. ))(/(2 1 SALIDASALIDASALIDA CIV f pi = En la salida de +20.9V, se tiene la siguiente frecuencia: )360)(6/9.20(2 1 9.20 FAV f V µpi=+ Hzf V 92.1269.20 =+ Para +5V, se tiene la siguiente frecuencia: )66)(1/5(2 1 5 FAV f V µpi=+ Hzf V 29.4825 =+ La ganancia del sistema se da mediante: ))(#)(( )(#)( )( sec 2 )( primarioeMAXiMAENTRADA undarioSALIDAMAXiMAENTRADA DC vueltasVV vueltasVV A − = Por lo tanto la ganancia máxima es da con la menor salida: +5V. )97)(1)(695.367( )2()5695.367( 2 vueltasVV vueltasVVADC − = 376.7=DCA La ganancia expresada en dB: )log(20)( DCMAXDC AG = dBG MAXDC 356.17)( = El ancho de banda BW debería ser igual a 10Khz, por lo que la ganancia que se necesita agregar para lograr dicho ancho de banda es de: )() 10log(20 MAXDC SALIDAMENOR Gf KHzG −= dB Hz KHzG 356.17) 92.126 10log(20 −= BWAdBG === 682.10 573.20 Con este valor de ganancia faltante, calculamos los componentes para compensar y alcanzar dicho ancho de banda. pF KHzKKHzAR C BW 37)20)(682.10)(20(2 1 )20)()((2 1 4 13 === pipi KKARR BW 84.213)682.10)(20()(1514 === , se hace 220K pF KRfC MENOR 89.5)84.213)(92.126(2 1 ))((2 1 14 12 === pipi 6. Diseño del filtro de entrada EMI - El propósito principal del filtro EMI es filtrar el ruido y los armónicos que genera la fuente conmutada. Un buen punto para iniciar el diseño es asumir 24dB de atenuación a 50Khz. Por lo que la frecuencia de esquina del filtro es:       = 4010 ATENUACIÓN TRABAJOC ff KHzKHzfC 5.1210)50( 40 24 ==       − Debemos utilizar el criterio de atenuación de -3dB o 0.707 (ξ) y de esta manera no producir ruido (armónicos). Además, se asume que la impedancia de la línea de entrada es 50Ω. Calculando el valor de inductancia del filtro: H KHz RL L µ pipi ζ 900)5.12( )707.0)(50( .f . c === ( )[ ] FHKHzLC µµpipi 18.0)900(5.122 1 )f(2 1 22 C === El valor comercial más cercano de ese condensador es 0.05µF, por lo que, para mantener la misma frecuencia, se debe recalcular el valor de la inductancia. ( )[ ] mHFKHzCL 24.3)05.0(5.122 1 )f(2 1 22 C === µpipi Ya que se diseño el filtro EMI, se continuará en esta sección diseñando la etapa de entrada en AC, cuya configuración típica es como se ve en la figura G.1.9: Figura G.1.9 Circuito filtro de entrada [42] Los diodos del puente (D1), serán del modelo 1N4004 pues la corriente que pasará por ahí es menor a 1A, calculando C3: 2 )()( 5 ))(( 3.0 DESEADORIZADOMINENTRADAAC ENTRADA VVf PC = 625 300)100)(558.254(60 )84.157(3.0 CF mVVHz WC === µ El fusible de protección F1 será de 2A pues la corriente máxima que pasará en la entrada será menor a 1A. Finalmente, con todos los componentes calculados, la fuente switching queda como la figura G.1.10: Figura G.1.10 Diseño final de la fuente flyback de 126W